A wide variety of implantable medical devices (IMDs) that employ electronic circuitry for providing electrical stimulation of body tissue and/or monitoring a physiologic condition are known in the art. A number of IMDs of various types are known in the art for delivering electrical stimulating pulses to selected body tissue and typically comprise an implantable pulse generator (IPG) for generating the stimulating pulses under prescribed conditions and at least one lead bearing a stimulation electrode for delivering the stimulating pulses to the selected tissue. For example, cardiac pacemakers and ICDs have been developed for maintaining a desired heart rate during episodes of bradycardia or for applying cardioversion or defibrillation therapies to the heart upon detection of serious arrhythmias. Other nerve, brain, muscle and organ tissue stimulating medical devices are also known for treating a variety of conditions.
Over the past 30 years, such IMDs have evolved, from relatively bulky, crude, and short-lived devices providing simple stimulation therapies and monitoring functions to complex, long-lived, and miniaturized AIDs, e.g., cardiac IMDs providing a wide variety of pacing and/or cardioversion and defibrillation therapies and/or monitoring functions. Numerous other programmable functions have been incorporated including enhanced capacity to detect and discriminate cardiac arrhythmias, to store data and to uplink telemetry data related to arrhythlnia episodes and applied therapies (if any). Moreover, the capability of interrogating stored device data and real time telemetry of physiologic data, e.g. the real time cardiac EGM and blood pressure and the like, have been incorporated into such IMDs.
Over the same time period, numerous improvements have been made in leads and sensors that are attached to the IMDs which provide for more reliable sensing of physiologic signals and delivery of therapies in therapy delivery IMDs. For example. improved pacing and sensing leads and cardioversion/defibrillation leads and electrodes that have enabled sensing the atrial and ventricular EGM and the delivery of pacing and cardioversion/defibrillation energy at specific selected upper and lower heart chambers. These improvements have led to dramatic reductions in the delivered pacing and shock energy required to capture and cardiovert or defibrillate a heart chamber, respectively. Moreover, in ICD IPGs, the high voltage output circuitry has been improved in many respects to provide monophasic, biphasic, or multi-phase cardioversion/defibrillation shock or pulse waveforms that are efficacious, sometimes with particular combinations of cardioversion/defibrillation electrodes, in lowering the required shock energy to cardiovert or defibrillate the heart.
The earliest implantable pacemaker IPGs employed very simple analog circuit oscillators formed by discrete transistors and other circuit components and were very short-lived and electrically inefficient. The incorporation of digital discrete ICs for logic and memory functions arrayed on circuit substrates and forms of circuit boards enabled higher electrical efficiency and set the stage for the development of more sophisticated operating functions, programmability of operating modes and parameters, data storage and telemetry of stored data as embodied in the MEDTRONIC.RTM. SPECTRAX.RTM. pacemaker IPGs. Throughout the course of development of these improvements, successive generations of such IMDs have incorporated improved, miniaturized electronic ICs and circuit boards that are powered by long-lived, low current output, low voltage batteries. Most recently, a wide number of IMD system architectures have been developed that incorporate custom microcomputers comprising a microprocessor, RAM and ROM and related elements of a typical microcomputer and other control logic, memory and signal processing circuitry. Such system architectures typically are embodied in two or more ICs that are mounted to a substrate and electrically coupled together. Certain of the ICs are formed by CMOS semiconductor fabrication and others are formed by bipolar semiconductor fabrication.
It is widely understood that such IMDs need to be small enough to be comfortably implanted subcutaneously without being unduly uncomfortable to the patient or cosmetically apparent and must be energy efficient enough to function reliably for many years.
Semiconductor ICs can be designed to be highly energy efficient, but the energy efficiency of ICs that are fabricated to the same design and using the same wafer fabrication process can vary considerably due to unavoidable variations in transistor switching characteristics including nodal capacitance. The electrical power required to operate any given IC in a batch at a specified clock speed, for example, can vary widely due to these variations. Because of the variability in CMOS IC power requirements to operate at a specified speed, it has been necessary to rigorously specify the IC performance and to then test and select ICs provided by vendors under an assumed operating voltage and current.
The typical IMD battery source is limited both in voltage and current output and is usually rated in terms of Amp-hours. With respect to CMOS logic ICs employed in IMDs, the useful life of a given battery, and hence the IMD itself, depends on the voltage and cumulative current drain required by the CMOS logic ICs and other powered components.
There are two distinct mechanisms of power dissipation in a typical CMOS logic gate. The first involves the charging of nodal capacitances of both the input and output of the logic gate as the state of the logic gate is switched. In each case, the power dissipation is proportional to the value of the nodal capacitance, the frequency of switching and the square of the supply voltage. The second mechanism is the switching current component due to both pmos and nmos transistors, which comprise a logic gate, simultaneously conducting current as the logic gate transitions output states. This component, typically referred to as "crowbar current", is distinctly different from the current required to switch the nodal capacitances inherent in CMOS logic gates.
The power supply voltage can be reduced to a level that is equal to the sum of the threshold of an n-channel transistor and the threshold of a p-channel transistor. Thus, the crowbar current is effectively eliminated by only one transistor conducting current regardless of the input voltage. Further reduction of the supply voltage will linearly reduce the current required to switch the nodal capacitances but at a cost of the speed at which switching can be accomplished.
However, the point at which the reduction in supply voltage compromises the operation of a CMOS logic gate varies in manufacturing from wafer to wafer and marginally from die to die. The task of completely testing for the lowest supply voltage that does not compromise operation of all logic gates of each IC die is lengthy. It might be theoretically possible to test for the lowest operating supply voltage of each CMOS IC employed in a given IMD and to provide separate regulated power supply voltages to each such IC. However, the cost of doing so during the fabrication of each individual IMD would greatly exceed any benefits in battery longevity that might be gained.
Thus, the typical approach to reducing current drain in CMOS logic ICs is to specify a supply voltage to the IC to a level that guarantees operation of all of the ICs powered by the IMD battery at the specified speed under worst case semiconductor fabrication processing for each such IC. This same approach of specifying a high enough voltage to account for fabrication variances is followed even when only a single such CMOS IC is employed in the IMM system. Therefore, in practice, excessive power may be consumed by the CMOS IC or ICs of the IMD operating system.
It is a principal object of the present invention to avoid the need for such testing and selection, to quickly determine the minimum operating voltage of dies, and to regulate the operating voltage to approach the minimum operating voltage, thereby minimizing current drain regardless of the manufacturing tolerances of each individual IC die.